With the trend toward designing semiconductor elements, such as ICs and LSIs, in a highly integrated form and in very small sizes and also for high-speed processes, in recent years the conductors formed on the printed circuit board for mounting the component have been made very fine, creating an extremely dense system of lines, in particular in the edge region. These systems require compact attachment of the component on the printed circuit board. In many technical applications, what is known as the flip-chip technique is used as a basis for establishing contacts of components or chips on the printed circuit board, for example in the production of chip cards, to connect the electrodes of the component directly to the lines of the printed circuit board.
However, on account of the small-sized systems, the electrical contact sites are spaced so close together that the electrical contact sites cannot be transferred onto the printed circuit board in the flip-chip process in a way that is certain to maintain contact.
Consequently, wiring of the original electrical contact sites is necessary to increase the distances between the individual contact sites.
The applicant knows of processes in which a number of components on a common wafer are wired simultaneously.
For example, it has previously been the practice to arrange a metal layer on a patterned insulating layer of an electronic or microelectronic component in such a way that firstly a thin metal layer is applied to the dielectric by means of a vacuum process. After covering with photoresist and patterning of the latter by means of photolithography, the metal layer is chemically or electrochemically reinforced, the resist is subsequently stripped and the first thin metal layer is etched back.
This process is complex and expensive. What is more, the stripping of the resist can lead to particle formation and, accordingly, to a reduction in yield.
Furthermore, the applicant knows of processes in which a metal layer is currentlessly deposited on a patterned dielectric.
However, the metallization created by this process has only small thicknesses. Consequently, it is suitable only for wiring components in cases where the connections of the component are supplied with only moderate current densities.
It is therefore the object of the present invention to provide a process which wires electrical contact sites on the surface of an electronic or microelectronic component with little time expended, in a simple way and with relatively low costs, the metal wiring interconnects being able to carry relatively great current densities.
This object is achieved according to the invention by the process with the features specified in patent claim 1.